Analog Design Engineer

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Job details

Company overview

The company is a semiconductor startup specializing in image processing and AI‑focused SoC and IP development. It provides end‑to‑end technical support covering planning, design, verification, and mass production, with an emphasis on performance optimization and reliability. Its solutions primarily target smart consumer products, with expansion into advanced industrial applications underway.

Responsibilities

Analog circuit design and PHY development for high-speed interfaces such as MIPI SerDes. 
Main responsibilities:

• Analog circuit design for high-speed interfaces such as MIPI D-PHY / C-PHY 
• High-speed SerDes circuit design (Driver / Receiver / PLL / CDR, etc.) 
• Signal Integrity / Jitter / Noise analysis 
• AMS simulation and modeling 
• Circuit optimization in collaboration with layout designers 
• Silicon evaluation and characterization 
• Interface specification definition with SoC teams

アナログ設計エンジニア（高速I/F・MIPI）MIPI SerDes等の高速インターフェースのアナログ回路設計およびPHY開発 業務内容：

• MIPI D-PHY / C-PHY等の高速I/Fアナログ回路設計
• 高速SerDes回路設計（Driver / Receiver / PLL / CDR 等）
• Signal Integrity / Jitter / Noise解析
• AMSシミュレーションおよびモデル作成
• レイアウト設計者との協業による回路最適化
• シリコン評価および特性解析
• SoCチームとのインターフェース仕様策定

Requirements

Minimum requirements:

• M- CMOS analog circuit design experience 
• Experience designing high-speed I/F (SerDes, etc.) or PLLs 
• Circuit simulation using SPICE / Spectre 
• Understanding of SI / PI / Jitter 
• Experience with advanced processes (28nm or below) 

Preferred qualifications:

• Experience with MIPI D-PHY / C-PHY design 
• PLL / CDR design experience 
• IBIS-AMI / channel simulation experience 
• Silicon evaluation experience 

必須要件：

•  CMOSアナログ回路設計経験
• 高速I/F(SerDes等)またはPLL等の設計経験
• SPICE / Spectre 等による回路シミュレーション
• SI / PI / Jitter等の理解
• 先端プロセス（28nm以下）設計経験

 歓迎要件：

• MIPI D-PHY / C-PHY設計経験
• PLL / CDR設計経験
• IBIS-AMI / channel simulation経験
• シリコン評価経験

Salary

12 - 16 million yen

Location

Tokyo