Digital Design Engineer (IP / SoC Integration)

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募集要項

会社概要

業務内容

RTL design and verification for MIPI controllers, ISP-related IP, and SoC subsystems. 
Main responsibilities: 

• MIPI controller RTL design 
• SoC subsystem design (MIPI + ISP + Memory + NPU collaboration) 
• SoC interconnect design (AXI / AHB, etc.) 
• IP integration and SoC top-level design 
• Verification environment construction using UVM, etc. 
• SoC bring-up support 

応募条件

Minimum requirements:

• RTL design (Verilog / SystemVerilog) 
• SoC integration experience 
• Understanding of AMBA AXI / AHB 
• Understanding of logic synthesis flows 
• Logic verification and debug experience 

Preferred qualifications:

• Understanding of MIPI protocols 
• ARM / processor experience 
• ISP / camera pipeline experience 
• UVM verification experience 
• FPGA prototyping experience 
• Experience collaborating with software teams 

給与

1200 - 1600 万円

勤務地

東京